EPM5032DC-25 vs EPM5032DC-20 비교

다음의 상세 나란히 비교: EPM5032DC-25 제조: Altera 및 EPM5032DC-20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5032DC-25 EPM5032DC-20
브랜드 Altera Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND Obsolete
재고 상태 In Stock In Stock
단가 (USD) $3.55 $5.05
Manufacturer Altera (Intel Programmable Solutions Group) Altera (now Intel Programmable Solutions Group)
Product Family MAX 5000 MAX 5000
Device Type UV Erasable Programmable Logic Device (EPLD) CPLD (Complex Programmable Logic Device)
Macrocells 32 32
Pin-to-Pin Propagation Delay (tPD) 25 ns —
Maximum Counter Frequency (fCNT) [DATA_NEEDED: maximum counter frequency] —
Setup Time (tSU) [DATA_NEEDED: setup time] —
Number of Dedicated Inputs 32 (in DIP-28 pinout) —
Number of I/O Pins 22 (in DIP-28 pinout, 4 used as dedicated inputs) —
패키지 CDIP-28 (Windowed Ceramic DIP-28) 20-pin DIP (Windowed Ceramic, 0.3" wide)
Process Technology CMOS, EPROM (UV-Erasable) —
Architecture PAL-Type, Single-LAB, 32-Macrocell —
Output Structure Programmable I/O with output enable —
Flip-Flop Configuration D, T, JK, or SR (programmable) —
동작 온도 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: commercial/industrial/military grade]
RoHS 상태 Lead Free / RoHS Compliant (per distributor listings) Compliant (per IC-Components listing)
Programming Method UV erase + Altera/Intel MAX+PLUS II programmer Altera MAX+PLUS II / Quartus (legacy support)
Erasure Method UV light through ceramic window —
Programmable Technology — UV-Erasable / OTP EPROM
Usable Gates — 600
Maximum Frequency (fCNT) — 71.4 MHz
Pin-to-Pin Delay (tPD) — 20 ns
Speed Grade — -20
Supply Voltage (VCC) — 5 V
실장 유형 — Through-Hole
Logic Blocks — 4 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: I/O pin count for DIP-20 variant]
Lead Free — [DATA_NEEDED: confirmed lead-free]

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