EPM5032DI-20 vs EPM5032DC-15 对比
详细并排对比 EPM5032DI-20 出自 Intel 和 EPM5032DC-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete规格对比
| 参数 | EPM5032DI-20 | EPM5032DC-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.75 | $9.95 |
| Family | MAX 5000 (Altera legacy EPLD) | MAX 5000 |
| Architecture | CMOS PAL-type EPLD with PIA | — |
| Macrocells | 32 | 32 |
| Dedicated Inputs | 7 | — |
| Bidirectional I/O Pins | 16 | — |
| Product Terms | 320 (maximum) | — |
| Flip-Flops | 16 (one per macrocell) | — |
| 最大时钟频率 | 62.5 MHz | — |
| Pin-to-Pin Delay | 20 ns (speed grade -20) | — |
| 封装 | Ceramic DIP-20 (windowed, UV-erasable) | CERDIP-28 (windowed, through-hole) |
| 工作温度 | Industrial (per 'I' suffix) | 0C to +70C (commercial) |
| Programming | UV-erasable CMOS, JEDEC fuse file | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Device Type | — | UV-erasable EPLD (PAL-type CMOS) |
| Usable Gates | — | 600 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal) |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| 安装类型 | — | Through-Hole (DIP) |
| Erasure Method | — | UV light through ceramic quartz window |
| Process Technology | — | CMOS |