EPM5032JC vs EPM5032JC25 对比
详细并排对比 EPM5032JC 出自 Altera 和 EPM5032JC25 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5032JC | EPM5032JC25 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $13.50 | $23.95 |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 32 | — |
| Logic Gates | 600 usable gates | — |
| Maximum I/O Pins | 40 | — |
| Propagation Delay (tPD) | [DATA_NEEDED: specific speed grade value] | 25 ns |
| Supply Voltage (VCC) | 5 V | — |
| Input Type | TTL-compatible | — |
| 输出类型 | TTL/CMOS-compatible | — |
| 封装 | PLCC-44 | 28-pin PLCC (JC) |
| 工作温度 | 0C to +70C (commercial) | — |
| 安装类型 | Surface Mount (J-lead) | Surface Mount |
| Programmability | UV-erasable (windowed ceramic) / OTP variants | — |
| Design Software | MAX+PLUS II / Quartus legacy | — |
| JEDEC Standard | JEDEC PLCC-44 footprint | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Device | — | EPM5032 |
| Logic Elements | — | 32 macrocells |
| Maximum Internal Frequency | — | 62.5 MHz |
| Product Terms | — | 320 |
| Flip-Flops | — | 32 |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 16 |
| Total Inputs to Array | — | 24 |
| 输出数量 | — | 16 |
| Architecture | — | PAL-type macrocells with global Programmable Interconnect Array (PIA) |
| Technology | — | CMOS EPROM, UV-erasable (windowed) / OTP |
| 电源电压 | — | 5 V (TTL-level I/O) |