EPM5064JI-1 vs EPM5064LI 对比

详细并排对比 EPM5064JI-1 出自 Intel 和 EPM5064LI 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5064JI-1 EPM5064LI
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $3.40 $9.95
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 64 64
User I/O Pins [DATA_NEEDED: user I/O count from datasheet] —
封装 68-pin PLCC (windowed ceramic) —
Logic Elements [DATA_NEEDED: total logic elements] —
Propagation Delay (tPD) [DATA_NEEDED: combinational tPD from datasheet] 55 ns (typical)
电源电压 5 V —
工作温度 [DATA_NEEDED: commercial vs industrial grade temp range] —
Process Technology CMOS, UV-erasable 1-micron EPIC CMOS
Speed Grade JI-1 (commercial, -10/-12/-15 family) —
Programmability UV-erasable (windowed package) —
Data Retention 25 years (per MAX 5000 datasheet) —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: not stated in provided data] [DATA_NEEDED: confirm RoHS status - legacy Altera part]
Logic Array Blocks (LABs) — 4
Number of Terminals — 44
Package Code — QCCJ (PLCC-44, J-bend)
Package Shape — Square
Configuration Memory — UV-Erasable / OTP (EPROM-based)
Supply Voltage (VCC) — 4.5 V to 5.5 V
Operating Temperature Grade — Industrial
最大时钟频率 — 33.3 MHz
I/O Pins — 28 bidirectional
Dedicated Inputs — 7
Total User Inputs — 36
Latch-up Immunity — 500 mA typical at 125 C

数据手册与资源

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