EPM5064LC-1 vs EPM5128GC-1 对比

详细并排对比 EPM5064LC-1 出自 Altera 和 EPM5128GC-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5064LC-1 EPM5128GC-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.95 $18.95
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 5000 MAX 5000
Macrocells 64 128
Logic Array Blocks (LABs) 4 —
Usable Gates 1.25K (approx.) 2,500
Supply Voltage (VCC) 4.75 V to 5.25 V —
Internal Operating Frequency 62.5 MHz —
Propagation Delay (tPD) 40 ns 16 ns (typical, -1 speed grade)
Input Lines 36 —
Dedicated Inputs 7 7
Output Lines 28 —
Programming Technology OTP / UV-Erasable EPROM —
封装 44-pin PLCC (Plastic Leaded Chip Carrier) PGA-96+ (Pin Grid Array, ceramic windowed)
Process Technology CMOS —
工作温度 [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy]
Programming Interface JTAG (ByteBlaster-compatible) —
Device Type — UV-erasable CMOS CPLD
Maximum User I/O Pins — 52
Nominal Supply Voltage — 5 V
Supply Voltage Range — 4.75 V to 5.25 V
Maximum Operating Frequency — 62.5 MHz
Technology — CMOS, UV-erasable EPROM
IOL / IOH — 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec])
Security Bit — Programmable, prevents readback
Programming Method — UV erase + EPROM program (or device programmer)
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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