EPM5128GC-2 vs EPM5128GC-1 对比

详细并排对比 EPM5128GC-2 出自 Altera 和 EPM5128GC-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5128GC-2 EPM5128GC-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $8.95 $18.95
Family MAX 5000 MAX 5000
Logic Elements / Gates 2,500 usable gates —
Macrocells 128 128
Number of Usable Gates 2,500 —
Maximum Operating Frequency 50 MHz 62.5 MHz
Propagation Delay (tPD) Approx. 25 ns (typical, -2 speed grade) 16 ns (typical, -1 speed grade)
Supply Voltage (VCC) 5 V (nominal) —
Package Type 68-pin PGA (Pin Grid Array) —
Package Code (per Partstack) WPGA —
Number of Terminals 68 —
Programming Technology UV-erasable EPROM —
工作温度 0C to +70C (commercial) -40C to +85C (industrial)
Grade (per Partstack) COMMERCIAL —
Terminal Form PIN/PEG —
Configuration Memory Non-volatile, one-time programmable (erasable via UV) —
Device Type — UV-erasable CMOS CPLD
Usable Gates — 2,500
Dedicated Inputs — 7
Maximum User I/O Pins — 52
Nominal Supply Voltage — 5 V
Supply Voltage Range — 4.75 V to 5.25 V
封装 — PGA-96+ (Pin Grid Array, ceramic windowed)
Technology — CMOS, UV-erasable EPROM
IOL / IOH — 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec])
Security Bit — Programmable, prevents readback
Programming Method — UV erase + EPROM program (or device programmer)
MSL 等级 — [DATA_NEEDED: MSL level]
RoHS 状态 — [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy]

数据手册与资源

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