EPM5128GC-2 vs EPM5128GC-1 비교
다음의 상세 나란히 비교: EPM5128GC-2 제조: Altera 및 EPM5128GC-1 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5128GC-2 | EPM5128GC-1 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $8.95 | $18.95 |
| Family | MAX 5000 | MAX 5000 |
| Logic Elements / Gates | 2,500 usable gates | — |
| Macrocells | 128 | 128 |
| Number of Usable Gates | 2,500 | — |
| Maximum Operating Frequency | 50 MHz | 62.5 MHz |
| Propagation Delay (tPD) | Approx. 25 ns (typical, -2 speed grade) | 16 ns (typical, -1 speed grade) |
| Supply Voltage (VCC) | 5 V (nominal) | — |
| Package Type | 68-pin PGA (Pin Grid Array) | — |
| Package Code (per Partstack) | WPGA | — |
| Number of Terminals | 68 | — |
| Programming Technology | UV-erasable EPROM | — |
| 동작 온도 | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Grade (per Partstack) | COMMERCIAL | — |
| Terminal Form | PIN/PEG | — |
| Configuration Memory | Non-volatile, one-time programmable (erasable via UV) | — |
| Device Type | — | UV-erasable CMOS CPLD |
| Usable Gates | — | 2,500 |
| Dedicated Inputs | — | 7 |
| Maximum User I/O Pins | — | 52 |
| Nominal Supply Voltage | — | 5 V |
| Supply Voltage Range | — | 4.75 V to 5.25 V |
| 패키지 | — | PGA-96+ (Pin Grid Array, ceramic windowed) |
| Technology | — | CMOS, UV-erasable EPROM |
| IOL / IOH | — | 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) |
| Security Bit | — | Programmable, prevents readback |
| Programming Method | — | UV erase + EPROM program (or device programmer) |
| MSL 레벨 | — | [DATA_NEEDED: MSL level] |
| RoHS 상태 | — | [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] |