EPM5128GC-2 vs EPM5128JC-2 对比

详细并排对比 EPM5128GC-2 出自 Altera 和 EPM5128JC-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5128GC-2 EPM5128JC-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $8.95 $21.75
Family MAX 5000 MAX 5000
Logic Elements / Gates 2,500 usable gates —
Macrocells 128 128
Number of Usable Gates 2,500 —
Maximum Operating Frequency 50 MHz —
Propagation Delay (tPD) Approx. 25 ns (typical, -2 speed grade) 45 ns (max)
Supply Voltage (VCC) 5 V (nominal) —
Package Type 68-pin PGA (Pin Grid Array) —
Package Code (per Partstack) WPGA —
Number of Terminals 68 —
Programming Technology UV-erasable EPROM —
工作温度 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
Grade (per Partstack) COMMERCIAL —
Terminal Form PIN/PEG —
Configuration Memory Non-volatile, one-time programmable (erasable via UV) —
Device Type — UV-Erasable Programmable Logic Device (PLD)
Dedicated Inputs — 7
Maximum Counter Frequency (fCNT) — 50 MHz
Input Setup Time (tSU) — 7.5 ns
Output Drive Current (IOH/IOL) — 12 mA DC
Process Technology — CMOS
封装 — 68-pin CQCC (Ceramic Quad Flat Pack), windowed
安装类型 — Surface Mount
电源电压 — 5 V (nominal)
Program/Erase Method — UV (ceramic window)
Erase/Program Cycles — [DATA_NEEDED: minimum erase/program cycles]
RoHS 状态 — Non-compliant (ceramic windowed package contains lead-bearing solder)
Logic Family — TTL-compatible I/O

数据手册与资源

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