EPM5130LC vs EPM5128LC2 对比

详细并排对比 EPM5130LC 出自 Altera 和 EPM5128LC2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ 最后一次采购

规格对比

参数 EPM5130LC EPM5128LC2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $15.60 $22.40
Series MAX 5000 —
Family MAX 5000 (EPM51xx) MAX 5000
Macrocells 128 128
Logic Array Blocks (LABs) 8 8
User I/O Pins 48 —
Total Inputs (Dedicated + I/O) 68 —
Dedicated Inputs 19 —
Propagation Delay (tPD) 55 ns 45 ns
Maximum Internal Clock Frequency 50 MHz —
Global Clock Inputs 1 1 dedicated
Configuration Technology UV-Erasable / OTP EPROM —
Process Technology CMOS (0.7 um EPROM) CMOS EPROM
Supply Voltage (VCC) 4.5 V to 5.5 V 5 V
I/O Standard TTL-compatible —
封装 JLCC-68 (J-Lead Ceramic Chip Carrier) PGA (Pin Grid Array, ceramic)
工作温度 [DATA_NEEDED: commercial/industrial/military grade] -40 C to +85 C (extended commercial)
安装类型 Surface Mount Through-Hole / Socketed
RoHS 状态 Non-compliant (ceramic JLCC, contains lead) [DATA_NEEDED: RoHS status]
Device Type — CPLD (Complex Programmable Logic Device)
Interconnect — Programmable Interconnect Array (PIA)
Configuration Memory — On-chip EPROM (non-volatile)
Boundary Scan — JTAG / IEEE 1149.1

数据手册与资源

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