EPM5192AGC84-15 vs EPM5192AJM84-15 对比

详细并排对比 EPM5192AGC84-15 出自 Altera 和 EPM5192AJM84-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AGC84-15 EPM5192AJM84-15
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $42.00 $21.00
Family MAX 5000 MAX 5000
Device Type UV-Erasable/OTP Complex PLD UV Erasable Programmable Logic Device (EPLD)
Macrocells 192 192
Logic Array Blocks (LABs) 12 —
User I/O Pins 64 84
Dedicated Inputs 7 —
Propagation Delay (tPD) 15 ns 15 ns
Maximum Internal Clock Frequency 83.3 MHz —
Supply Voltage (VCC) 4.5 V to 5.5 V —
Process Technology CMOS 5 V CMOS, UV-EPROM
Programmable Element UV-Erasable EPROM cell —
封装 84-pin Ceramic PGA (Pin Grid Array) 84-pin ceramic J-lead (JM84)
安装类型 Through-Hole Surface Mount (ceramic J-lead)
工作温度 Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] —
RoHS 状态 [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] Non-compliant (ceramic with UV window)
Speed Grade — -15 (15 ns tPD)
Maximum Operating Frequency — 83.3 MHz
工作温度范围 — -55C to +125C (military grade)
电源电压 — [DATA_NEEDED: VCC range]
Erase Method — Ultraviolet (windowed ceramic package)
Programming Method — EPROM-style (programmer + UV erase)
I/O Standard — TTL-compatible CMOS
Development Tool — Altera MAX+PLUS II
生命周期状态 — Obsolete (EOL by Altera, now supported by Microchip / 3rd-party distributors)

数据手册与资源

浏览全部产品 创建 BOM 获取报价