EPM5192AGC84-20 vs EPM5192AJC84-20 对比
详细并排对比 EPM5192AGC84-20 出自 Altera 和 EPM5192AJC84-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 Obsolete规格对比
| 参数 | EPM5192AGC84-20 | EPM5192AJC84-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $41.20 | $19.20 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 7 |
| Logic Gates (typical) | [DATA_NEEDED: typical gate count] | — |
| Maximum Clock Frequency (fMAX) | 66.7 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| 封装 | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) | 84-pin PLCC J-Lead (WQCCJ, J84) |
| Package Code | WPGA | — |
| Erasure Method | UV-Erasable (with OTP window) | — |
| Process Technology | CMOS | CMOS, UV-erasable EEPROM |
| Operating Temperature Grade | Commercial | Commercial |
| 电源电压 | [DATA_NEEDED: VCC range] | — |
| I/O Standard | 5V CMOS / TTL compatible | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| 安装类型 | Through-Hole (Pin Grid Array socket) | Surface Mount (J-Lead) |
| Device Type | — | UV-erasable/OTP Complex PLD (CPLD) |
| Propagation Delay (tpd) | — | 33 ns (speed grade -20) |
| 最大时钟频率 | — | 66.7 MHz |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V |
| User I/O Lines | — | 64 |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus (legacy) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |