EPM5192AGC84-20 vs EPM5192AJC84-20 비교
다음의 상세 나란히 비교: EPM5192AGC84-20 제조: Altera 및 EPM5192AJC84-20 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 Obsolete사양 비교
| 파라미터 | EPM5192AGC84-20 | EPM5192AJC84-20 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $41.20 | $19.20 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 7 |
| Logic Gates (typical) | [DATA_NEEDED: typical gate count] | — |
| Maximum Clock Frequency (fMAX) | 66.7 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| 패키지 | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) | 84-pin PLCC J-Lead (WQCCJ, J84) |
| Package Code | WPGA | — |
| Erasure Method | UV-Erasable (with OTP window) | — |
| Process Technology | CMOS | CMOS, UV-erasable EEPROM |
| Operating Temperature Grade | Commercial | Commercial |
| 공급 전압 | [DATA_NEEDED: VCC range] | — |
| I/O Standard | 5V CMOS / TTL compatible | — |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| 실장 유형 | Through-Hole (Pin Grid Array socket) | Surface Mount (J-Lead) |
| Device Type | — | UV-erasable/OTP Complex PLD (CPLD) |
| Propagation Delay (tpd) | — | 33 ns (speed grade -20) |
| 최대 클록 주파수 | — | 66.7 MHz |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V |
| User I/O Lines | — | 64 |
| MSL 레벨 | — | [DATA_NEEDED: MSL level] |
| Programming Tool | — | Altera MAX+PLUS II / Quartus (legacy) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |