EPM5192AJC84-20 vs EPM5192AJI84-20 对比

详细并排对比 EPM5192AJC84-20 出自 Altera 和 EPM5192AJI84-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AJC84-20 EPM5192AJI84-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $19.20 $10.95
Family MAX 5000 —
Device Type UV-erasable/OTP Complex PLD (CPLD) UV-Erasable / OTP Complex PLD
Macrocells 192 —
Propagation Delay (tpd) 33 ns (speed grade -20) —
最大时钟频率 66.7 MHz —
Supply Voltage (Vcc) 4.75 V to 5.25 V —
Dedicated Inputs 7 —
User I/O Lines 64 —
Process Technology CMOS, UV-erasable EEPROM CMOS
封装 84-pin PLCC J-Lead (WQCCJ, J84) —
Operating Temperature Grade Commercial Industrial
安装类型 Surface Mount (J-Lead) Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status of EPM5192AJI84-20]
Programming Tool Altera MAX+PLUS II / Quartus (legacy) —
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free status] —
Device Family — MAX 5000 (EPM5192)
Logic Cells / Macrocells — 192 macrocells
Propagation Delay (tPD) — 33 ns
Maximum Frequency (fCNT) — 66.7 MHz
Supply Voltage (VCC) — 5 V nominal (4.5 V to 5.5 V)
Package Code — WQCCJ (JEDEC)
Package Type — 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI)
Terminal Form — J-Bend
Number of Terminals — 84
Programmability — UV-erasable window + OTP
引脚数量 — 84
生命周期状态 — Obsolete (legacy Altera MAX 5000)

数据手册与资源

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