EPM5192AQI100-20 vs EPM5192AQM100-20 对比

详细并排对比 EPM5192AQI100-20 出自 Altera 和 EPM5192AQM100-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。

Altera

EPM5192AQI100-20 - MAX 5000 192-Macrocell EPLD, 20ns, PQFP-100 | Altera

EPM5192AQI100-20 Obsolete

Intel

EPM5192AQM100-20 Obsolete

参数	EPM5192AQI100-20	EPM5192AQM100-20
品牌	Altera	Intel
分类	FPGA & CPLD	FPGA & CPLD
生命周期状态	Obsolete	Obsolete
库存状态	有库存	有库存
单价（USD）	$18.90	$8.20
Family	MAX 5000 EPLD	—
Device Series	EPM5192	—
Technology	CMOS, UV-erasable EPROM	—
Propagation Delay	20 ns (speed grade -20)	—
Logic Array Blocks (LABs)	12	—
Interconnect	Programmable Interconnect Array (PIA)	—
Macrocell Count	192	—
Dedicated Inputs	7	7
I/O Pins	64 bidirectional	—
封装	100-pin PQFP (R-PQFP-G100)	100-pin PQFP (JESD-30 code R-PQFP-G100)
JEDEC Package Outline	R-PQFP-G100	—
工作温度	Industrial grade ("I" suffix)	—
安装类型	Surface Mount (PQFP)	Surface Mount
Architecture	Classic EPLD, deterministic timing	—
Design Tool	Altera MAX+PLUS II (legacy)	—
RoHS 状态	[DATA_NEEDED: RoHS compliance status]	[DATA_NEEDED: verified from manufacturer product page]
电源电压	[DATA_NEEDED: VCC range]	[DATA_NEEDED: VCC range from datasheet]
Device Family	—	MAX 5000 (EPLD / classic CPLD)
Logic Elements	—	192 macrocells across 12 Logic Array Blocks (LABs)
Number of LABs	—	12
User I/O Lines	—	64
Pin-to-Pin Propagation Delay (tPD)	—	33 ns
Maximum Clock Frequency (fMAX)	—	66.7 MHz
Process Technology	—	CMOS EPROM-based
Configuration Memory	—	On-chip EPROM (non-volatile, one-time programmable in this package)
Boundary-Scan Test	—	JTAG / IEEE 1149.1 compatible
External Clock Input	—	Yes (global clock pin)
Operating Temperature Grade	—	[DATA_NEEDED: explicit temperature grade from datasheet]