EPM5192GC-2 vs EPM5192LC-2 对比
详细并排对比 EPM5192GC-2 出自 Altera 和 EPM5192LC-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192GC-2 | EPM5192LC-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $92.00 | $7.95 |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (LABs of 16 macrocells each) | — |
| Usable I/O Pins | [DATA_NEEDED: exact user I/O count for PGA package] | — |
| Propagation Delay (tPD) | 12 ns typical (-2 grade) | 45 ns (typical, -2 speed grade) |
| Counter Frequency | 100 MHz minimum | — |
| Supply Voltage (VCC) | 5 V nominal | — |
| Technology | CMOS EPROM | — |
| Programmable Technology | UV-erasable / one-time programmable | — |
| Programming Toolchain | Altera MAX+PLUS II | — |
| Package Type | Pin Grid Array (PGA), ceramic | — |
| 工作温度 | Commercial (0C to +70C) | [DATA_NEEDED: commercial/industrial/military grade] |
| Speed Grade | -2 | — |
| RoHS 状态 | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |
| 安装类型 | Through-hole (PGA socket) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| Dedicated Input Pins | — | 7 |
| External Clock Inputs | — | 1 |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| 封装 | — | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| 电源电压 | — | 5 V (typical MAX 5000 family) |