EPM5192GC1 vs EPM5192AGC 对比

详细并排对比 EPM5192GC1 出自 Altera 和 EPM5192AGC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192GC1 EPM5192AGC
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $24.50 $56.00
Family MAX 5000 MAX 5000 (High-Speed, High-Density MAX 5000 Devices)
Device Type CPLD (Complex Programmable Logic Device) UV-Erasable / OTP Complex PLD (EPLD)
Macro Cells 192 —
Usable Gates 3,750 —
Maximum Operating Frequency 62.5 MHz —
Supply Voltage (VCC) 5 V —
Programming Technology UV-Erasable / OTP EPROM —
Package Type Ceramic PGA (Pin Grid Array) —
Logic Elements 192 macrocells with AND/OR array —
Process Technology EPROM-based CMOS CMOS
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Propagation Delay [DATA_NEEDED: tpd specification] —
引脚数 [DATA_NEEDED: pin count for GC1 PGA package] —
安装类型 Through-hole (PGA) Through-hole (Pin Grid Array)
RoHS 状态 unknown Non-compliant (ceramic PGA contains lead; legacy military/industrial grade)
Development Tool Altera MAX+PLUS II —
Macrocells — 192
Logic Density — High-density (per MAX 5000 family definition)
Architecture — CMOS, sum-of-products with macrocell output logic
封装 — 84-pin Ceramic PGA (Pin Grid Array, windowed or windowless)
Speed Grade Suffix — C (commercial grade; specific pin-to-pin delay varies by base number -15/-20)
Programmability — UV-erasable (windowed package) / One-Time-Programmable (windowless variant)
Security Bit — Programmable security bit (per MAX 5000 family)
电源电压 — [DATA_NEEDED: VCC nominal and tolerance]
Lifecycle — Obsolete (legacy Altera MAX 5000 family; maintained for long-lifecycle programs)
Programming Support — MAX+PLUS II legacy toolchain / Altera-compatible third-party programmers

数据手册与资源

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