EPM5192GC1 vs EPM5192AGC 비교

다음의 상세 나란히 비교: EPM5192GC1 제조: Altera 및 EPM5192AGC 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192GC1 EPM5192AGC
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $24.50 $56.00
Family MAX 5000 MAX 5000 (High-Speed, High-Density MAX 5000 Devices)
Device Type CPLD (Complex Programmable Logic Device) UV-Erasable / OTP Complex PLD (EPLD)
Macro Cells 192 —
Usable Gates 3,750 —
Maximum Operating Frequency 62.5 MHz —
Supply Voltage (VCC) 5 V —
Programming Technology UV-Erasable / OTP EPROM —
Package Type Ceramic PGA (Pin Grid Array) —
Logic Elements 192 macrocells with AND/OR array —
Process Technology EPROM-based CMOS CMOS
동작 온도 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Propagation Delay [DATA_NEEDED: tpd specification] —
핀 수 [DATA_NEEDED: pin count for GC1 PGA package] —
실장 유형 Through-hole (PGA) Through-hole (Pin Grid Array)
RoHS 상태 unknown Non-compliant (ceramic PGA contains lead; legacy military/industrial grade)
Development Tool Altera MAX+PLUS II —
Macrocells — 192
Logic Density — High-density (per MAX 5000 family definition)
Architecture — CMOS, sum-of-products with macrocell output logic
패키지 — 84-pin Ceramic PGA (Pin Grid Array, windowed or windowless)
Speed Grade Suffix — C (commercial grade; specific pin-to-pin delay varies by base number -15/-20)
Programmability — UV-erasable (windowed package) / One-Time-Programmable (windowless variant)
Security Bit — Programmable security bit (per MAX 5000 family)
공급 전압 — [DATA_NEEDED: VCC nominal and tolerance]
Lifecycle — Obsolete (legacy Altera MAX 5000 family; maintained for long-lifecycle programs)
Programming Support — MAX+PLUS II legacy toolchain / Altera-compatible third-party programmers

데이터시트 & 자료

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