EPM5192JC-1N vs EPM5192JC1 对比

详细并排对比 EPM5192JC-1N 出自 Altera 和 EPM5192JC1 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192JC-1N EPM5192JC1
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $19.85 $48.30
Family MAX 5000 MAX 5000 (MAX 5xxx CPLD)
Device Type CPLD - Complex Programmable Logic Device —
Macrocells 192 —
Logic Array Blocks (LABs) 12 —
Usable Gates 3750 3750
User I/O Pins 64 —
Dedicated Inputs 7 —
External Clock Inputs (GCLK) 1 —
Propagation Delay (tPD) 40 ns —
Maximum Clock Frequency (fMAX) 62.5 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V 5 V (nominal)
Technology CMOS EPROM (UV-erasable) —
封装 84-pin Ceramic Quad Flat Pack (CQFP) [DATA_NEEDED: exact package from datasheet]
JEDEC Package Code S-CQCC-J84 —
工作温度 [DATA_NEEDED: industrial/commercial temperature range] [DATA_NEEDED: operating temp range]
Programming Interface JTAG / Altera ByteBlaster JTAG-compatible (Altera MAX 5xxx)
Manufacturer — Intel (formerly Altera Corporation)
Macro Cells — 192
Maximum Operating Frequency — 62.5 MHz
Process Technology — 0.5 µm CMOS, UV-erasable EPROM
Propagation Delay (typ) — [DATA_NEEDED: propagation delay in ns]
I/O Pins — [DATA_NEEDED: I/O pin count]
安装类型 — [DATA_NEEDED: surface mount or through-hole]
Logic Blocks (LABs) — 24 (8 macrocells per LAB)
RoHS 状态 — unknown
AEC-Q100 — not_applicable
Lifecycle — Obsolete - last-time-buy stock only at franchised distributors

数据手册与资源

浏览全部产品 创建 BOM 获取报价