EPM5192JC-2 vs EPM5192JI-2 对比
详细并排对比 EPM5192JC-2 出自 Altera 和 EPM5192JI-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192JC-2 | EPM5192JI-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $22.50 | $9.95 |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable Programmable Logic Device (PLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 12 |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns | — |
| 最大时钟频率 | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| 封装 | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | JLCC-68 (J-Lead Ceramic) |
| 安装类型 | Surface Mount | Surface Mount |
| Number of Terminals | 84 | — |
| Programming Method | UV-erase / EPROM | — |
| 工作温度范围 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | Non-compliant (ceramic JLCC, contains lead) |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 5000 |
| Flip-Flops | — | 192 |
| Speed Grade | — | -2 |
| 工作温度 | — | 0C to +70C (commercial) |
| Programming Technology | — | UV-Erasable EPROM |
| Architecture | — | Sum-of-products with Programmable Interconnect Array (PIA) |
| 电源电压 | — | 5 V (typical) |
| 生命周期状态 | — | Obsolete (legacy Altera MAX 5000 family) |