EPM5192JI-2 vs EPM5192JC-1 对比

详细并排对比 EPM5192JI-2 出自 Altera 和 EPM5192JC-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192JI-2 EPM5192JC-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.95 $22.40
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macrocells 192 192
Usable Gates 5000 3750
Dedicated Inputs 12 —
Flip-Flops 192 —
Speed Grade -2 —
封装 JLCC-68 (J-Lead Ceramic) —
工作温度 0C to +70C (commercial) 0 C to +70 C (commercial)
Programming Technology UV-Erasable EPROM —
Architecture Sum-of-products with Programmable Interconnect Array (PIA) —
电源电压 5 V (typical) —
Process Technology CMOS EPROM —
安装类型 Surface Mount —
RoHS 状态 Non-compliant (ceramic JLCC, contains lead) —
生命周期状态 Obsolete (legacy Altera MAX 5000 family) —
Technology — CMOS, UV-Erasable / OTP
Propagation Delay (tPD) — 40 ns (speed grade -1)
Maximum Internal Frequency (fMAX) — 62.5 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V
User I/O Pins — 84
Package Type — 84-pin Ceramic Quad Flat Pack (CQFP), windowed
JEDEC Package Code — S-CQCC-J84
Configuration Memory — UV-EPROM (erasable under UV lamp)
Programming Interface — Altera MAX programming interface (parallel, pre-JTAG for this family)
Process — CMOS EPROM
I/O Standard — TTL/CMOS 5 V compatible

数据手册与资源

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