EPM570GM256C5N vs EPM570M256C5N 对比

详细并排对比 EPM570GM256C5N 出自 Intel 和 EPM570M256C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570GM256C5N EPM570M256C5N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $18.60 $19.45
Series MAX II EPM570
Family CPLD - Complex Programmable Logic Device MAX II
Macro Cells 440 440
Logic Array Blocks (LABs) 57 —
Number of I/Os 160 —
Maximum Operating Frequency 304 MHz 201.1 MHz
Maximum Internal Frequency (datasheet fMAX) 201.1 MHz —
Pin-to-Pin Logic Delay (Speed Grade C5) 5 ns —
Operating Supply Voltage (Core VCCINT) 1.71 V to 1.89 V (1.8 V nominal) —
I/O Bank Supply Voltages 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) —
Process Technology 0.18 um flash-based CMOS 0.18 µm CMOS, non-volatile Flash
Programmable Type In System Programmable (ISP) via JTAG —
封装 / 外壳 256-ball Micro FineLine BGA, 11x11 mm, 0.8 mm pitch —
工作温度 0 °C to +85 °C (commercial) 0°C to +85°C (commercial)
安装方式 SMD/SMT —
Packaging Tray —
Lead Free / RoHS Status See manufacturer page; legacy part - verify per lot —
Configuration Memory Internal flash (non-volatile, instant-on) —
JTAG Support Yes (IEEE 1149.1 / 1532) —
Vertical Migration Pin-compatible with EPM1270 and EPM2210 in the 256-MBGA package —
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements (LEs) — 440
Pin-to-Pin Delay (tPD) — 5.4 ns
Supply Voltage - Core — 1.8 V
Supply Voltage - I/O Banks — 2.5 V / 3.3 V
User I/O Pins — 212 (max, package-limited)
User Flash Memory — 8 Kbits
封装 — 256-MBGA (Micro FineLine BGA), 1.0 mm pitch
安装类型 — Surface Mount
Configuration Interface — JTAG (IEEE 1149.1) / in-system programmable
RoHS 状态 — Compliant
Lead-Free — Yes

数据手册与资源

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