EPM570GT100I5 vs EPM570T10015 对比
详细并排对比 EPM570GT100I5 出自 Altera 和 EPM570T10015 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM570GT100I5 | EPM570T10015 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $4.95 | $7.95 |
| Series | MAX II | — |
| Logic Elements (LE) | 570 | — |
| Macrocells | 440 | — |
| Maximum User I/O Pins | 76 | 76 |
| Propagation Delay (tPD) | 5.4 ns (typ) | — |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| User I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Programmability | In-System Programmable (ISP) via JTAG, non-volatile flash | — |
| Configuration Time | Instant-On (< 1 ms, no external PROM required) | — |
| 工作温度 | -40 C to +100 C (Industrial, "I5") | — |
| 封装 | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | TQFP-100 (T100) 14 x 14 mm |
| 安装类型 | Surface Mount (Gull-wing leads) | — |
| Typical Active Current | [DATA_NEEDED: typical active ICC] | — |
| Speed Grade | GT (fast) | — |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS compliance status] |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| Global Clock Networks | 4 | — |
| Device Family | — | MAX II |
| Logic Elements | — | 570 |
| Macro Cells | — | 440 |
| Pin-to-Pin Delay (tPD) | — | 15 ns (commercial/industrial speed grade) |
| Propagation Delay | — | [DATA_NEEDED: detailed tPD/tCO/tSU datasheet values] |
| Supply Voltage - Core (VCCINT) | — | 3.3 V (2.5 V variants exist in MAX II family) |
| Supply Voltage - I/O (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-volt I/O) |
| 工作温度范围 | — | -40 °C to +85 °C (industrial) |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| Programming Interface | — | JTAG (IEEE 1149.1 / IEEE Std 1532) |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL (per pin) |
| Process Technology | — | 0.18 µm |
| MSL 等级 | — | [DATA_NEEDED: moisture sensitivity level] |