EPM570GT100I5 vs EPM570T100A5N 对比

详细并排对比 EPM570GT100I5 出自 Altera 和 EPM570T100A5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM570GT100I5 EPM570T100A5N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $4.95 $6.72
Series MAX II —
Logic Elements (LE) 570 —
Macrocells 440 440
Maximum User I/O Pins 76 —
Propagation Delay (tPD) 5.4 ns (typ) —
Internal Supply Voltage (VCCINT) 1.71 V to 1.89 V —
User I/O Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) —
User Flash Memory 8 Kbits —
Programmability In-System Programmable (ISP) via JTAG, non-volatile flash —
Configuration Time Instant-On (< 1 ms, no external PROM required) —
工作温度 -40 C to +100 C (Industrial, "I5") -40 °C to +125 °C (industrial)
封装 100-pin TQFP (14x14 mm, 0.5 mm pitch) 100-pin TQFP
安装类型 Surface Mount (Gull-wing leads) Surface Mount
Typical Active Current [DATA_NEEDED: typical active ICC] —
Speed Grade GT (fast) —
RoHS 状态 Compliant Compliant
JTAG Support IEEE 1149.1 boundary scan —
Global Clock Networks 4 —
Device Family — MAX II
Logic Elements — 570
User I/O Pins — 76
Number of Logic Array Blocks (LABs) — 57
Pin-to-Pin Logic Delay (tPD) — 5.4 ns
Maximum Internal Frequency — 304 MHz
Core Supply Voltage (VCCINT) — 1.8 V (typical)
I/O Supply Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt)
User Flash Memory (UFM) — 8 Kbits
Configuration Memory — On-chip non-volatile flash
Programming Interface — JTAG (IEEE 1149.1) - ISP

数据手册与资源

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