EPM570GT100I5 vs EPM570T100A5N Comparação
Comparação detalhada lado a lado de EPM570GT100I5 por Altera e EPM570T100A5N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM570GT100I5 | EPM570T100A5N |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $4,95 | $6,72 |
| Series | MAX II | — |
| Logic Elements (LE) | 570 | — |
| Macrocells | 440 | 440 |
| Maximum User I/O Pins | 76 | — |
| Propagation Delay (tPD) | 5.4 ns (typ) | — |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| User I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| User Flash Memory | 8 Kbits | — |
| Programmability | In-System Programmable (ISP) via JTAG, non-volatile flash | — |
| Configuration Time | Instant-On (< 1 ms, no external PROM required) | — |
| Temperatura de operação | -40 C to +100 C (Industrial, "I5") | -40 °C to +125 °C (industrial) |
| Encapsulamento | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | 100-pin TQFP |
| Tipo de montagem | Surface Mount (Gull-wing leads) | Surface Mount |
| Typical Active Current | [DATA_NEEDED: typical active ICC] | — |
| Speed Grade | GT (fast) | — |
| Status RoHS | Compliant | Compliant |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| Global Clock Networks | 4 | — |
| Device Family | — | MAX II |
| Logic Elements | — | 570 |
| User I/O Pins | — | 76 |
| Number of Logic Array Blocks (LABs) | — | 57 |
| Pin-to-Pin Logic Delay (tPD) | — | 5.4 ns |
| Maximum Internal Frequency | — | 304 MHz |
| Core Supply Voltage (VCCINT) | — | 1.8 V (typical) |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Configuration Memory | — | On-chip non-volatile flash |
| Programming Interface | — | JTAG (IEEE 1149.1) - ISP |