EPM570T10015 vs EPM570GT100C5 对比
详细并排对比 EPM570T10015 出自 Altera 和 EPM570GT100C5 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM570T10015 | EPM570GT100C5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.95 | $10.95 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macro Cells | 440 | — |
| User Flash Memory | 8 Kbits | — |
| Maximum User I/O Pins | 76 | — |
| 封装 | TQFP-100 (T100) 14 x 14 mm | TQFP-100 (100-pin TQFP, 14x14 mm) |
| Pin-to-Pin Delay (tPD) | 15 ns (commercial/industrial speed grade) | — |
| Propagation Delay | [DATA_NEEDED: detailed tPD/tCO/tSU datasheet values] | — |
| Supply Voltage - Core (VCCINT) | 3.3 V (2.5 V variants exist in MAX II family) | — |
| Supply Voltage - I/O (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-volt I/O) | — |
| 工作温度范围 | -40 °C to +85 °C (industrial) | — |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE Std 1532) | JTAG IEEE 1149.1, ISP |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, SSTL (per pin) | — |
| Process Technology | 0.18 µm | 0.30 µm 6-layer-metal flash |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | Compliant |
| MSL 等级 | [DATA_NEEDED: moisture sensitivity level] | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | — | 570 |
| Equivalent Macrocells | — | 440 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Maximum User I/O | — | 76 |
| Propagation Delay (tPD) | — | 5.4 ns |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltages (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V |
| 工作温度 | — | 0 °C to +85 °C (Commercial) |
| Configuration Method | — | Non-volatile flash (instant-on) |
| 安装类型 | — | Surface Mount |