EPM570T10015 vs EPM570GT100C5 比較
詳細な並列比較: EPM570T10015 メーカー: Altera および EPM570GT100C5 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570T10015 | EPM570GT100C5 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $7.95 | $10.95 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macro Cells | 440 | — |
| User Flash Memory | 8 Kbits | — |
| Maximum User I/O Pins | 76 | — |
| パッケージ | TQFP-100 (T100) 14 x 14 mm | TQFP-100 (100-pin TQFP, 14x14 mm) |
| Pin-to-Pin Delay (tPD) | 15 ns (commercial/industrial speed grade) | — |
| Propagation Delay | [DATA_NEEDED: detailed tPD/tCO/tSU datasheet values] | — |
| Supply Voltage - Core (VCCINT) | 3.3 V (2.5 V variants exist in MAX II family) | — |
| Supply Voltage - I/O (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-volt I/O) | — |
| 動作温度範囲 | -40 °C to +85 °C (industrial) | — |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE Std 1532) | JTAG IEEE 1149.1, ISP |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, SSTL (per pin) | — |
| Process Technology | 0.18 µm | 0.30 µm 6-layer-metal flash |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | Compliant |
| MSLレベル | [DATA_NEEDED: moisture sensitivity level] | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | — | 570 |
| Equivalent Macrocells | — | 440 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Maximum User I/O | — | 76 |
| Propagation Delay (tPD) | — | 5.4 ns |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltages (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V |
| 動作温度 | — | 0 °C to +85 °C (Commercial) |
| Configuration Method | — | Non-volatile flash (instant-on) |
| 実装タイプ | — | Surface Mount |