EPM570ZM100I8N vs 5M240ZM68I5N 对比

详细并排对比 EPM570ZM100I8N 出自 Altera 和 5M240ZM68I5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
5M240ZM68I5N 5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N - 68-Ball Industrial MAX V CPLD | Intel

5M240ZM68I5N ✓ 量产中

规格对比

参数 EPM570ZM100I8N 5M240ZM68I5N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $16.50 $1.25
Device Family MAX II —
Series EPM570Z MAX V
Logic Elements 570 240
Number of Macrocells 440 192
Number of Logic Array Blocks (LABs) 57 —
User I/Os 76 —
Maximum Operating Frequency 152 MHz —
Propagation Delay (tPD) 9 ns 7.5 ns
Operating Supply Voltage (Core) 1.8 V —
Programming Technology Flash, non-volatile —
In-System Programmability (ISP) Yes (JTAG) —
Boundary Scan IEEE 1149.1 (JTAG) —
工作温度范围 -40 C to +85 C (Industrial) —
安装方式 SMD/SMT —
封装 / 外壳 100-ball FineLine BGA (MBGA, 0.8 mm pitch) —
Packaging Tray —
Device Type — CPLD (Complex Programmable Logic Device)
Configuration Memory — Nonvolatile Flash
Package Type — TFBGA-68
Number of Terminals — 68 (ball)
Package Code — TFBGA
Form of Terminal — Ball
Package Shape — Square
Operating Temperature Grade — Industrial
JTAG Interface — TMS, TDI, TDO, TCK (Bank 1)
Programming Method — JTAG / in-system programmable
电源电压 — [DATA_NEEDED: VCCINT and VCCIO levels]
I/O Standards — Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins)
安装类型 — Surface Mount
RoHS 状态 — Compliant
Lead Free — Yes

数据手册与资源

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