EPM7128AETC144-10 vs EPM7128ATC144-10 对比
详细并排对比 EPM7128AETC144-10 出自 Altera 和 EPM7128ATC144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7128AETC144-10 | EPM7128ATC144-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $21.70 | $9.10 |
| Family | MAX 7000A | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Maximum User I/Os | 36 | — |
| Pin-to-pin Logic Delay (tPD) | 10 ns | — |
| Maximum Internal Counter Frequency | 98 MHz | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Voltage Tolerance | 2.5 V / 3.3 V / 5 V | — |
| 工作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| 封装 | 144-pin TQFP (also referred to as LQFP-144) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) and ByteBlaster | — |
| Non-volatile Memory | EEPROM, instant-on | — |
| Global Clocks / Global OE | 2 / 2 | — |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | MSL 3 (per JEDEC J-STD-020) | — |
| RoHS 状态 | [DATA_NEEDED: rohs status from manufacturer] | unknown (legacy Altera device) |
| Manufacturer | — | Altera (now Intel) |
| Series | — | MAX 7000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Type | — | EE PLD (EEPROM-based, in-system programmable) |
| Logic Array Blocks | — | 4 |
| User I/O Pins | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 98 MHz |
| Supply Voltage - Internal (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Voltage Levels | — | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) |
| In-System Programmability | — | Yes (IEEE Std 1149.1 JTAG) |
| 封装 / 外壳 | — | 144-TQFP (20 x 20 mm) |
| Architecture | — | Multiple Array Matrix (MAX), 2nd generation |