EPM7128AETC144-10 vs EPM7128ATC144-10 比較
詳細な並列比較: EPM7128AETC144-10 メーカー: Altera および EPM7128ATC144-10 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM7128AETC144-10 | EPM7128ATC144-10 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.70 | $9.10 |
| Family | MAX 7000A | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Maximum User I/Os | 36 | — |
| Pin-to-pin Logic Delay (tPD) | 10 ns | — |
| Maximum Internal Counter Frequency | 98 MHz | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Voltage Tolerance | 2.5 V / 3.3 V / 5 V | — |
| 動作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| パッケージ | 144-pin TQFP (also referred to as LQFP-144) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) and ByteBlaster | — |
| Non-volatile Memory | EEPROM, instant-on | — |
| Global Clocks / Global OE | 2 / 2 | — |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | MSL 3 (per JEDEC J-STD-020) | — |
| RoHS ステータス | [DATA_NEEDED: rohs status from manufacturer] | unknown (legacy Altera device) |
| Manufacturer | — | Altera (now Intel) |
| Series | — | MAX 7000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Type | — | EE PLD (EEPROM-based, in-system programmable) |
| Logic Array Blocks | — | 4 |
| User I/O Pins | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 98 MHz |
| Supply Voltage - Internal (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Voltage Levels | — | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) |
| In-System Programmability | — | Yes (IEEE Std 1149.1 JTAG) |
| パッケージ / ケース | — | 144-TQFP (20 x 20 mm) |
| Architecture | — | Multiple Array Matrix (MAX), 2nd generation |