EPM7128AETC144-7 vs EPM7128ATC144-10 对比
详细并排对比 EPM7128AETC144-7 出自 Intel 和 EPM7128ATC144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7128AETC144-7 | EPM7128ATC144-10 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $16.40 | $9.10 |
| Series | MAX 7000A | MAX 7000A |
| Programmable Type | In-System Programmable (ISP), EEPROM | EE PLD (EEPROM-based, in-system programmable) |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Number of Usable Gates | 2,500 | — |
| Number of I/Os | 100 | — |
| Propagation Delay (tPD) Max | 7.5 ns | — |
| Maximum Operating Frequency | 129.9 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V tolerant | — |
| 工作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| 封装 | 144-pin TQFP (20x20 mm) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster) | — |
| Configuration Memory | EEPROM, non-volatile | — |
| ISP Endurance | 100 cycles typical per macrocell | — |
| Process Technology | CMOS | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | unknown (legacy Altera device) |
| Manufacturer | — | Altera (now Intel) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| Logic Array Blocks | — | 4 |
| User I/O Pins | — | 68 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 98 MHz |
| Supply Voltage - Internal (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Voltage Levels | — | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) |
| In-System Programmability | — | Yes (IEEE Std 1149.1 JTAG) |
| 封装 / 外壳 | — | 144-TQFP (20 x 20 mm) |
| Architecture | — | Multiple Array Matrix (MAX), 2nd generation |