EPM7128AETI144-10N vs EPM7128AETC144-7 对比

详细并排对比 EPM7128AETI144-10N 出自 Altera 和 EPM7128AETC144-7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128AETI144-10N EPM7128AETC144-7
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $23.10 $16.40
Family MAX 7000A —
Macrocells 128 —
Usable Gates 2,500 —
Logic Array Blocks (LABs) 8 —
Maximum User I/O Pins 100 —
Propagation Delay (tPD) 10 ns —
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) 3.0 V to 3.6 V
Programming Technology EEPROM (in-system programmable) —
JTAG Interface IEEE Std 1149.1 BST compliant —
封装 TQFP-144 (144-pin) 144-pin TQFP (20x20 mm)
工作温度 -40C to +85C (industrial) 0C to +70C (Commercial)
Process Technology 0.35 µm CMOS EEPROM CMOS
安装类型 Surface Mount Surface Mount
MSL 等级 3 —
RoHS 状态 Compliant [DATA_NEEDED: RoHS status]
Speed Grade -10 (10 ns tPD) —
Operating Frequency (fCNT) [DATA_NEEDED: fCNT counter frequency] —
Series — MAX 7000A
Programmable Type — In-System Programmable (ISP), EEPROM
Number of Macrocells — 128
Number of Logic Array Blocks (LABs) — 8
Number of Usable Gates — 2,500
Number of I/Os — 100
Propagation Delay (tPD) Max — 7.5 ns
Maximum Operating Frequency — 129.9 MHz
I/O Voltage (MultiVolt) — 2.5 V / 3.3 V / 5.0 V tolerant
Programming Interface — IEEE 1149.1 JTAG (ByteBlaster / USB-Blaster)
Configuration Memory — EEPROM, non-volatile
ISP Endurance — 100 cycles typical per macrocell

数据手册与资源

浏览全部产品 创建 BOM 获取报价