EPM7128ATI100-10 vs EPM7128AETC100-10N 对比

详细并排对比 EPM7128ATI100-10 出自 Altera 和 EPM7128AETC100-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7128ATI100-10 EPM7128ATI100-10 - 128-Macrocell 10ns 3.3V CPLD | Altera MAX 7000A

EPM7128ATI100-10 - 128-Macrocell 10ns 3.3V CPLD | Altera MAX 7000A

EPM7128ATI100-10 ⚠ 最后一次采购

规格对比

参数 EPM7128ATI100-10 EPM7128AETC100-10N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $13.85 $9.95
Series MAX 7000A EPM7128AE
Family MAX 7000A (MAX II of MAX 7000 series) MAX 7000AE
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Programmable Type EE PLD (EEPROM-based, in-system programmable) —
Number of Macrocells 128 —
Number of Logic Array Blocks (LABs) 4 —
Usable Gates 2,500 2500
Number of I/O Pins 68 —
Propagation Delay (tPD) 10 ns —
Maximum Frequency (fMAX) 87 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V typical) —
I/O Standard MultiVolt (2.5V / 3.3V / 5.0V tolerant) —
Programming Interface IEEE Std. 1149.1 JTAG (ISP) —
工作温度 -40C to +85C (Industrial, 'I' suffix) 0C to +70C (commercial)
封装 100-pin TQFP (14x14 mm) TQFP-100
Process Technology CMOS EEPROM CMOS EEPROM
RoHS 状态 Non-compliant (legacy part) —
安装类型 Surface Mount Surface Mount
Macrocells — 128
Logic Array Blocks — 16
User I/Os — 84
Supply Voltage (Core) — 3.3 V
I/O Tolerance — 5.0 V tolerant
Pin-to-Pin Delay (tPD) — 10 ns
Speed Grade — -10
Maximum Frequency — [DATA_NEEDED: maximum toggle frequency]
Programming — JTAG (IEEE 1149.1) ISP / EEPROM
Lead-Free / RoHS — Yes (N suffix)
Architecture — Multiple Array MatriX (MAX) - 2nd generation
PCI Compliance — Yes (33 MHz, -10 grade per PCI SIG 2.2)

数据手册与资源

浏览全部产品 创建 BOM 获取报价