EPM7128EQC100-20 vs EPM7128EQI100-15 对比
详细并排对比 EPM7128EQC100-20 出自 Altera 和 EPM7128EQI100-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7128EQI100-15 - MAX 7000 CPLD, 128 Macrocells, 15ns | Altera/Intel
EPM7128EQI100-15 Obsolete规格对比
| 参数 | EPM7128EQC100-20 | EPM7128EQI100-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $11.05 | $32.75 |
| Family | MAX 7000 | MAX 7000 |
| Device Type | EPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 128 | 128 |
| Usable Gates | 2.5K | 2.5K |
| User I/Os | 84 | — |
| Logic Elements / LABs | 8 LABs (16 macrocells per LAB) | — |
| Propagation Delay (tpd) | 20 ns | — |
| Maximum Internal Frequency | 250 MHz | — |
| Technology | CMOS, UV-erasable / EEPROM | — |
| 电源电压 | 5 V | — |
| 工作温度 | 0 C to 90 C (Commercial) | -40 °C to +85 °C (industrial grade, "I" suffix) |
| 封装 | 100-pin PQFP (BQFP, gull-wing) | 100-pin PQFP (BQFP, 14x20 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| In-System Programming | Yes (IEEE 1149.1 JTAG) | — |
| Compliance | RoHS compliance status not confirmed in web data | — |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells each) |
| User I/O Pins | — | 84 |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programming Technology | — | EEPROM (non-volatile, in-system programmable) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) compliant |
| RoHS 状态 | — | Compliant (lead-free; verify per lot) |
| Manufacturer | — | Altera (now Intel FPGA) |