EPM7128SLI84-15 vs EPM7128SLI84-10N 对比

详细并排对比 EPM7128SLI84-15 出自 Intel 和 EPM7128SLI84-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7128SLI84-15 EPM7128SLI84-10N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $8.40 $8.45
Family MAX 7000 MAX 7000S
Series EPM7128S —
Device Type EE PLD (CPLD) —
Macrocells 128 —
Logic Elements 250 (approx.) —
User I/O Pins 84 (68 in 84-pin PLCC per some sources) —
Propagation Delay (tpd) 15 ns —
Supply Voltage (VCCINT) 4.5 V to 5.5 V 4.75 V to 5.25 V (5 V typical)
I/O Voltage Tolerance 3.3 V or 5.0 V (configurable) 3.3 V / 5 V MultiVolt I/O
Process Technology CMOS EEPROM CMOS EEPROM
Program Memory Type EEPROM (in-system programmable) —
封装 PLCC-84 (Plastic Leaded Chip Carrier, J-lead) 84-pin PLCC (J-Lead)
工作温度 -40 C to +85 C (Industrial grade, 'I' suffix) -40 C to +85 C (Industrial)
引脚数量 84 —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount
RoHS 状态 [DATA_NEEDED: rohs status] [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration]
Programming Interface JTAG (IEEE 1149.1) —
Maximum User Flash Endurance 100 program/erase cycles —
Data Retention 20 years —
Logic Cells / Macro Cells — 128 macro cells
Usable Gates — 2,500
Number of Logic Elements / Blocks — 16 Logic Array Blocks (LABs)
User I/Os — 68
Propagation Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — 125 MHz
Programmability — In-system programmable (ISP), non-volatile EEPROM
Boundary-Scan (JTAG) — IEEE Std 1149.1 compliant
Lead-Free — [DATA_NEEDED: lead-free per latest Intel/Altera declaration]

数据手册与资源

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