EPM7128SQC100-6 vs EPM7128SQC100-15 对比
详细并排对比 EPM7128SQC100-6 出自 Intel 和 EPM7128SQC100-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7128SQC100-6 | EPM7128SQC100-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.10 | $8.20 |
| Family | MAX 7000S | MAX 7000 |
| Logic Family | CMOS (EEPROM-based) | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| User I/Os | 84 | 84 |
| 引脚数 | 100 | — |
| 封装 | PQFP-100 (SQC), 100-BQFP | 100-pin PQFP (Plastic Quad Flat Pack) |
| Propagation Delay (tPD) | 6 ns | — |
| Internal Frequency | 147.1 MHz | — |
| 电源电压 | 5 V | — |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Programmable via | JTAG (IEEE 1149.1) ISP | — |
| 存储器类型 | Non-volatile EEPROM | — |
| 安装类型 | Surface Mount (Tray) | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: rohs status] | Non-compliant (SnPb lead finish - legacy PQFP) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells each) |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX value] |
| Typical Gate Count | — | 2,500 gates |
| Supply Voltage (VCCINT) | — | 5 V (5% tolerance) |
| Programming Technology | — | EEPROM (in-system programmable via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| MSL 等级 | — | 3 (168 hours) |