EPM7128STC100-15N vs EPM7128STC100-7 对比
详细并排对比 EPM7128STC100-15N 出自 Intel 和 EPM7128STC100-7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7128STC100-15N - 128-Macro Cell CPLD, 15ns, 100-TQFP | Intel / Altera
EPM7128STC100-15N Obsolete规格对比
| 参数 | EPM7128STC100-15N | EPM7128STC100-7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.20 | $8.20 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000S | — |
| Usable Gates | 2,500 | 2,500 |
| Macro Cells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | 8 |
| Maximum User I/O | 84 | — |
| Pin-to-Pin Logic Delay (tPD) | 15 ns (-15 speed grade) | — |
| Maximum Internal Frequency | 76.9 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Supply Voltage (VCCIO) | 3.3 V or 5 V (per bank) | — |
| Technology | CMOS EEPROM, in-system programmable | — |
| 封装 | 100-pin TQFP | 100-Pin TQFP (TQFP-100) |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| JTAG (IEEE 1149.1) | Yes - in-system programming | — |
| Output Options | Totem-pole or open-drain (per pin) | — |
| Dedicated Inputs | 4 global inputs | — |
| RoHS 状态 | Non-RoHS (legacy SnPb finish typical) | [DATA_NEEDED: rohs status] |
| 生命周期状态 | Obsolete (PDN effective 2017-06-01) | — |
| Series | — | MAX 7000S |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 84 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| Logic Family | — | CMOS |
| Programmable Pin Count | — | 100 |
| 安装类型 | — | Surface Mount |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Configuration Memory | — | EEPROM (non-volatile) |