EPM7128STI100-10N vs EPM7128BTC100-10 对比
详细并排对比 EPM7128STI100-10N 出自 Altera 和 EPM7128BTC100-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N Obsolete规格对比
| 参数 | EPM7128STI100-10N | EPM7128BTC100-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.85 | $11.20 |
| Family | MAX 7000S | MAX 7000B |
| Architecture | CMOS EEPROM-based CPLD | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 (up to 5,000 family max) | 2.5K |
| Logic Array Blocks (LABs) | 8 | 8 (16 macrocells each) |
| Maximum User I/O | 84 | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 175.4 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| JTAG Boundary-Scan | Yes (BST) | — |
| 封装 | 100-pin TQFP | TQFP-100 |
| 工作温度 | -40C to +85C (Industrial) | 0C to +70C (commercial) |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | Compliant (lead-free) |
| Open-Drain I/O Option | Available (per MAX 7000A feature set) | — |
| User I/Os | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | 125 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 3.3 V (5V tolerant inputs) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Technology | — | CMOS EEPROM |