EPM7128STI100-10N vs EPM7128BTC100-10 Comparison
Detailed side-by-side comparison of EPM7128STI100-10N by Altera and EPM7128BTC100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N ObsoleteIntel
EPM7128BTC100-10 - MAX 7000B CPLD, 128 Macrocells, 10ns | Intel
EPM7128BTC100-10 β Last Time BuySpecification Comparison
| Parameter | EPM7128STI100-10N | EPM7128BTC100-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $11.20 |
| Family | MAX 7000S | MAX 7000B |
| Architecture | CMOS EEPROM-based CPLD | β |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 (up to 5,000 family max) | 2.5K |
| Logic Array Blocks (LABs) | 8 | 8 (16 macrocells each) |
| Maximum User I/O | 84 | β |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | β |
| Maximum Counter Frequency | 175.4 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | β |
| JTAG Boundary-Scan | Yes (BST) | β |
| Package | 100-pin TQFP | TQFP-100 |
| Operating Temperature | -40C to +85C (Industrial) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (lead-free) |
| Open-Drain I/O Option | Available (per MAX 7000A feature set) | β |
| User I/Os | β | 84 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Frequency (fCNT) | β | 125 MHz |
| Core Voltage (VCCINT) | β | 2.5 V |
| I/O Voltage (VCCIO) | β | 3.3 V (5V tolerant inputs) |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |
| Technology | β | CMOS EEPROM |