EPM7160SQC160-7 vs EPM7160EQC160-12 对比
详细并排对比 EPM7160SQC160-7 出自 Altera 和 EPM7160EQC160-12 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7160SQC160-7 | EPM7160EQC160-12 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $9.75 |
| Family | MAX 7000S | MAX 7000E |
| Macrocells | 160 | 160 |
| Logic Array Blocks (LABs) | 10 | 4 |
| Usable System Gates | 3,200 | — |
| Product Terms per Macrocell | 32 | — |
| Maximum User I/Os | 104 | — |
| Global Clocks | 2 | 4 |
| Speed Grade | -7 (7.5 ns pin-to-pin) | — |
| Maximum Propagation Delay (tPD) | 7.5 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5.0 V nominal) | 5.0 V |
| Program Memory Type | EEPROM (in-system programmable) | — |
| 工作温度 | 0 °C to 70 °C (commercial) | 0 °C to +70 °C (Commercial) |
| 封装 | 160-pin PQFP (BQFP, 28x28 mm) | PQFP-160 (EQC), Gull-Wing |
| 安装类型 | Surface Mount | Surface Mount |
| JTAG (IEEE 1149.1) | Yes (ISP via JTAG) | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 | — |
| RoHS 状态 | Not Compliant (per Arrow listing) | [DATA_NEEDED: RoHS status] |
| Part Status | Obsolete | — |
| Usable Gates | — | 3,200 |
| User I/O Pins | — | 104 |
| Pin-to-Pin Logic Delay (tPD) | — | 12 ns |
| I/O Voltage | — | 5.0 V |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Non-volatile Configuration | — | EEPROM |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |