EPM7192SQI160-10N vs EPM7192SQC160-10N 对比
详细并排对比 EPM7192SQI160-10N 出自 Intel 和 EPM7192SQC160-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7192SQC160-10N - 192-Macrocell MAX 7000S CPLD, 10ns, 160-Pin PQFP | Altera
EPM7192SQC160-10N Nrnd规格对比
| 参数 | EPM7192SQI160-10N | EPM7192SQC160-10N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $35.90 | $9.95 |
| Series | MAX 7000S | MAX 7000S |
| Family | MAX 7000 | MAX 7000 |
| Architecture | Second-generation MAX (CMOS, EEPROM) | — |
| Logic Elements / Macrocells | 192 macrocells | — |
| Usable Gates | 3.75K (typical) | 3,750 |
| User I/Os | 124 | — |
| 引脚数量 | 160 | — |
| 封装 | PQFP-160 (QFP-160, plastic) | — |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Maximum Internal Frequency | 167 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| Supply Voltage (VCCIO) | 5.0 V | — |
| In-System Programmability | Yes (5V ISP, JTAG) | Yes (IEEE 1149.1 JTAG) |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| 工作温度 | 0C to +70C (industrial, 'N' suffix) | [DATA_NEEDED: commercial/industrial grade] |
| 安装类型 | Surface Mount | Surface Mount |
| Technology | 5V CMOS, EEPROM configuration memory | — |
| Logic Family | CMOS | — |
| Propagation Delay | 7.5 ns to 10 ns (speed grade dependent) | — |
| RoHS 状态 | Compliant (per lead-free PQFP package marking) | [DATA_NEEDED: RoHS compliance status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 124 |
| Maximum Operating Frequency | — | 100 MHz |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| 封装 / 外壳 | — | 160-BQFP (PQFP, 0.65 mm pitch) |