EPM7192SQI160-10N vs EPM7192SQC160-10N 比較
詳細な並列比較: EPM7192SQI160-10N メーカー: Intel および EPM7192SQC160-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7192SQC160-10N - 192-Macrocell MAX 7000S CPLD, 10ns, 160-Pin PQFP | Altera
EPM7192SQC160-10N Nrnd仕様比較
| パラメータ | EPM7192SQI160-10N | EPM7192SQC160-10N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $35.90 | $9.95 |
| Series | MAX 7000S | MAX 7000S |
| Family | MAX 7000 | MAX 7000 |
| Architecture | Second-generation MAX (CMOS, EEPROM) | — |
| Logic Elements / Macrocells | 192 macrocells | — |
| Usable Gates | 3.75K (typical) | 3,750 |
| User I/Os | 124 | — |
| ピン数 | 160 | — |
| パッケージ | PQFP-160 (QFP-160, plastic) | — |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Maximum Internal Frequency | 167 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| Supply Voltage (VCCIO) | 5.0 V | — |
| In-System Programmability | Yes (5V ISP, JTAG) | Yes (IEEE 1149.1 JTAG) |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| 動作温度 | 0C to +70C (industrial, 'N' suffix) | [DATA_NEEDED: commercial/industrial grade] |
| 実装タイプ | Surface Mount | Surface Mount |
| Technology | 5V CMOS, EEPROM configuration memory | — |
| Logic Family | CMOS | — |
| Propagation Delay | 7.5 ns to 10 ns (speed grade dependent) | — |
| RoHS ステータス | Compliant (per lead-free PQFP package marking) | [DATA_NEEDED: RoHS compliance status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 124 |
| Maximum Operating Frequency | — | 100 MHz |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| パッケージ / ケース | — | 160-BQFP (PQFP, 0.65 mm pitch) |