EPM7256AETC100-7N vs EPM7256AETC100-5N 对比
详细并排对比 EPM7256AETC100-7N 出自 Intel 和 EPM7256AETC100-5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7256AETC100-7N - 256-Macrocell MAX 7000A CPLD, 3.3V, 100TQFP | Intel
EPM7256AETC100-7N Nrnd规格对比
| 参数 | EPM7256AETC100-7N | EPM7256AETC100-5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $48.75 | $9.75 |
| Series | MAX 7000A | MAX 7000AE |
| Programmable Type | In System Programmable (ISP) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Elements/Blocks | 16 | — |
| Number of User I/Os | 84 | — |
| Number of Gates | 5000 | — |
| Propagation Delay tPD (max) | 7.5 ns | — |
| Maximum Frequency fCNT | 126.6 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V | — |
| 工作温度 | 0 C to 70 C (Commercial) | 0C to +70C (Commercial) |
| 安装类型 | Surface Mount | Surface Mount |
| 封装 | 100-pin TQFP (14 x 14 mm) | TQFP-100 (1.0 mm pitch, 14x14 mm) |
| Technology | CMOS, EEPROM-based | — |
| Programming Interface | IEEE 1149.1 (JTAG) | — |
| RoHS 状态 | Compliant | Compliant (lead-free) |
| Family | — | MAX 7000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 256 |
| Usable Gates | — | 5000 (range 600 to 10000) |
| User I/Os | — | 84 |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay (tPD) | — | 5.0 ns |
| Counter Frequency (fCNT) | — | up to 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5.0 V |
| Program Memory | — | Internal EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| MSL 等级 | — | 3 (168 hours) |
| Process Technology | — | CMOS, EEPROM-based |
| Security Bit | — | Programmable |