EPM9320ALI84-10 vs EPM9320LC84-15 对比

详细并排对比 EPM9320ALI84-10 出自 Intel 和 EPM9320LC84-15 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320ALI84-10 EPM9320LC84-15
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $19.95 $17.95
Family MAX 9000 MAX 9000
Product Type CPLD (Complex Programmable Logic Device) —
Usable Gates 6,000 to 12,000 6,000
Macrocells 320 320
User I/O Pins 84 —
封装 84-pin PLCC (Plastic Leaded Chip Carrier) 84-pin PLCC (Plastic Leaded Chip Carrier)
Pin-to-Pin Delay (Tpd1) 10 ns —
Maximum Counter Frequency 144 MHz —
Supply Voltage (VCC) 5.0 V 4.75 V to 5.25 V (5.0 V nominal)
In-System Programmability Yes, via IEEE 1149.1 JTAG —
Program Memory Technology CMOS EEPROM —
Process Technology CMOS —
Architecture Multiple Array MatriX (MAX) —
工作温度范围 -40C to +85C (Industrial) —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount
Series — EPM9320
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) — 20
Propagation Delay (tPD) — 15 ns (max)
最大时钟频率 — 117.6 MHz
Programmability — 5.0 V in-system programmable (ISP) via JTAG
JTAG Interface — IEEE Std. 1149.1 boundary-scan compliant
工作温度 — -40C to +85C (commercial) [DATA_NEEDED: exact grade]
Technology — CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX)
Built-in Pull-up Resistors — Yes, on every I/O pin
Architecture Feature — Pin-locking across design iterations
RoHS 状态 — [DATA_NEEDED: confirm from manufacturer]

数据手册与资源

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