EPM9320ARC208-10N vs EPM9320RC208-10 对比
详细并排对比 EPM9320ARC208-10N 出自 Altera 和 EPM9320RC208-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9320ARC208-10N | EPM9320RC208-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $19.45 | $26.40 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 320 | — |
| Logic Gates | 6,000 gates | — |
| Logic Array Blocks (LABs) | 16 | [DATA_NEEDED: LAB count] |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Frequency | 144.9 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| User I/O Pins | 168 | — |
| Dedicated Input Pins | 12 | — |
| 封装 | 208-pin RQFP (BFQFP with exposed pad) | 208-pin RQFP (RC) |
| 安装类型 | Surface Mount | — |
| 工作温度 | 0C to +70C (Commercial) | Commercial (0C to +70C) - 'C' suffix |
| Programming Interface | IEEE Std. 1149.1 JTAG | JTAG (ByteBlaster/BitBlaster) |
| Configuration Memory | Non-volatile EEPROM | — |
| RoHS 状态 | Compliant (lead-free 'N' suffix) | ROHS3 Compliant (per fpgalink listing) |
| Usable Gates | — | 6,000 |
| Macrocells | — | 320 |
| 电源电压 | — | 5 V |
| Speed Grade | — | -10 |
| Non-volatile Configuration | — | Yes (EPROM/EEPROM based) |
| Design Tool Support | — | MAX+PLUS II, Quartus (legacy) |
| 湿敏等级（MSL） | — | 3 (168 Hours) |
| Lead Time | — | 1-7 days (per fpgalink listing) |