EPM9320RC208-20 vs EPM9320RC208-15N 对比
详细并排对比 EPM9320RC208-20 出自 Altera 和 EPM9320RC208-15N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9320RC208-20 | EPM9320RC208-15N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $21.90 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | 20 | — |
| Usable Gates | 6,000 | 6,000 |
| Maximum I/O Pins | 132 | — |
| Propagation Delay (tPD max) | 20 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Programming Technology | EEPROM, in-system programmable (ISP) | — |
| Boundary-Scan Interface | IEEE Std. 1149.1 (JTAG) | — |
| 工作温度 | 0 °C to 70 °C (commercial) | — |
| 封装 | 208-RQFP, exposed pad (208-BFQFP) | 208-pin RQFP (PowerQuad Flat Pack) |
| 安装类型 | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 3rd generation | — |
| Process Technology | CMOS, 5.0 V EEPROM | — |
| Reprogrammability | Yes, unlimited ISP cycles | — |
| Macro Cells | — | 320 |
| Flip-Flops | — | 484 |
| Configurable I/O Lines | — | 128 |
| Propagation Delay (tPD) | — | 15 ns |
| 最大时钟频率 | — | 117.6 MHz |
| 电源电压 | — | 5.0 V |
| I/O Voltage Compatibility | — | 3.3 V or 5 V |
| Configuration Technology | — | CMOS EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Terminal Pitch | — | 0.5 mm |
| 工作温度范围 | — | 0C to +70C (commercial) |
| Packaging | — | Tray |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |