EPM9560ARI208-10N vs EPM9560RI208-10N 对比

详细并排对比 EPM9560ARI208-10N 出自 Altera 和 EPM9560RI208-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560ARI208-10N EPM9560RI208-10N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $22.10 $61.75
Family MAX 9000 MAX 9000
Product Type CPLD (Complex Programmable Logic Device) —
Usable Gates 12,000 12,000
Macrocells 560 —
Logic Array Blocks (LABs) 35 —
Maximum User I/O Pins 212 —
Flip-Flops 484 —
Propagation Delay (tPD1) 10 ns —
Clock-to-Output (tCO) 4.5 ns —
Setup Time (tSU) 3.0 ns —
Maximum Counter Frequency (fCNT) 144.9 MHz —
电源电压 5.0 V 5 V
Logic Family CMOS EEPROM —
Programming Interface JTAG (IEEE 1149.1) - In-System Programmable —
封装 208-pin RQFP (Plastic) 208-pin RQFP (PQFP)
工作温度 0 C to 70 C (Commercial) -40C to +85C (Industrial grade, "RI" suffix)
安装类型 Surface Mount —
Device Type — CPLD (Complex Programmable Logic Device)
Architecture — CMOS EEPROM-based Multiple Array MatriX (MAX)
Macro Cells — 560
Register Bits — 12,160
User I/Os — 212
Pin-to-Pin Delay — 10 ns (speed grade -10)
Maximum Frequency — 100 MHz to 125 MHz
Programming Method — In-system via IEEE 1149.1 (JTAG)
MSL 等级 — 3 (168 Hours)
RoHS 状态 — ROHS3 Compliant (per fpgalink)
Configuration Memory — On-chip EEPROM (non-volatile)

数据手册与资源

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