EPM9560ARI240-10 vs EPM9560GC280-15N 对比

详细并排对比 EPM9560ARI240-10 出自 Altera 和 EPM9560GC280-15N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560ARI240-10 EPM9560GC280-15N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $0.00 $125.00
Family MAX 9000 —
Device Type CPLD (Complex Programmable Logic Device) —
Usable Gates 12,000 12,000 (typical)
Macro Cells 560 —
User I/O Pins 191 —
封装 240-pin RQFP (PowerQuad Flat Pack) CPGA-280 (Ceramic Pin Grid Array, 280 pins)
Pin-to-Pin Propagation Delay 10 ns —
Internal Frequency 144.9 MHz —
电源电压 5.0 V —
Technology CMOS, EEPROM-based configuration —
工作温度范围 -40 C to +85 C (industrial) —
安装类型 Surface Mount —
Configuration Memory EEPROM (non-volatile, instant-on) —
Logic Architecture Multiple Array MatriX (MAX) with global interconnect array —
RoHS 状态 [DATA_NEEDED: RoHS status] —
Moisture Sensitivity Level [DATA_NEEDED: MSL level] —
Number of Terminals 240 —
Terminal Form Gull Wing PIN/PEG
Device Family — MAX 9000
Product Type — EE PLD / CPLD
Macrocell Count — 560
Propagation Delay (tPD) — 16.6 ns
最大时钟频率 — 117.6 MHz
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Maximum Supply Voltage — 5.25 V
Logic Technology — CMOS EEPROM
In-System Programmability — Yes (5.0-V ISP via JTAG)
Boundary-Scan (JTAG) — IEEE Std. 1149.1 compliant
Package Code — PGA / CPGA280
Operating Temperature Grade — Commercial
Architecture — Multiple Array MatriX (MAX) 3rd generation

数据手册与资源

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