EPM9560GC280-15N vs EPM9560GM280-15 对比
详细并排对比 EPM9560GC280-15N 出自 Intel 和 EPM9560GM280-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560GC280-15N | EPM9560GM280-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $125.00 | $110.00 |
| Device Family | MAX 9000 | — |
| Product Type | EE PLD / CPLD | — |
| Macrocell Count | 560 | — |
| Usable Gates | 12,000 (typical) | — |
| Propagation Delay (tPD) | 16.6 ns | — |
| 最大时钟频率 | 117.6 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| Maximum Supply Voltage | 5.25 V | — |
| Logic Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | Yes (5V ISP via JTAG IEEE 1149.1) |
| Boundary-Scan (JTAG) | IEEE Std. 1149.1 compliant | — |
| 封装 | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | FineLine BGA-280 (GM) |
| Package Code | PGA / CPGA280 | — |
| Terminal Form | PIN/PEG | — |
| Operating Temperature Grade | Commercial | — |
| Architecture | Multiple Array MatriX (MAX) 3rd generation | — |
| Family | — | MAX 9000 |
| Device Type | — | EE PLD (EEPROM-based) |
| Macrocells | — | 560 |
| Flip-Flops | — | 772 |
| User I/O | — | 216 |
| Logic Array Blocks (LABs) | — | 35 (16 macrocells each) |
| Supply Voltage (Nominal) | — | 5.0 V |
| Supply Voltage (Max) | — | 5.5 V |
| I/O Logic Level Support | — | 3.3 V or 5 V |
| Pin-to-Pin Delay (tPD) | — | 15 ns (speed grade -15) |
| Process Technology | — | CMOS EEPROM |
| 工作温度 | — | -40C to +85C (industrial) |
| RoHS 状态 | — | ROHS3 Compliant |
| MSL 等级 | — | 3 (168 Hours) |