EPM9560GC280-15N vs EPM9560GM280-15 Comparison
Detailed side-by-side comparison of EPM9560GC280-15N by Intel and EPM9560GM280-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560GC280-15N | EPM9560GM280-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $125.00 | $110.00 |
| Device Family | MAX 9000 | β |
| Product Type | EE PLD / CPLD | β |
| Macrocell Count | 560 | β |
| Usable Gates | 12,000 (typical) | β |
| Propagation Delay (tPD) | 16.6 ns | β |
| Maximum Clock Frequency | 117.6 MHz | β |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | β |
| Maximum Supply Voltage | 5.25 V | β |
| Logic Technology | CMOS EEPROM | β |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | Yes (5V ISP via JTAG IEEE 1149.1) |
| Boundary-Scan (JTAG) | IEEE Std. 1149.1 compliant | β |
| Package | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | FineLine BGA-280 (GM) |
| Package Code | PGA / CPGA280 | β |
| Terminal Form | PIN/PEG | β |
| Operating Temperature Grade | Commercial | β |
| Architecture | Multiple Array MatriX (MAX) 3rd generation | β |
| Family | β | MAX 9000 |
| Device Type | β | EE PLD (EEPROM-based) |
| Macrocells | β | 560 |
| Flip-Flops | β | 772 |
| User I/O | β | 216 |
| Logic Array Blocks (LABs) | β | 35 (16 macrocells each) |
| Supply Voltage (Nominal) | β | 5.0 V |
| Supply Voltage (Max) | β | 5.5 V |
| I/O Logic Level Support | β | 3.3 V or 5 V |
| Pin-to-Pin Delay (tPD) | β | 15 ns (speed grade -15) |
| Process Technology | β | CMOS EEPROM |
| Operating Temperature | β | -40C to +85C (industrial) |
| RoHS Status | β | ROHS3 Compliant |
| MSL Level | β | 3 (168 Hours) |