EPM9560GI280-15 vs EPM9560GI280-20 对比

详细并排对比 EPM9560GI280-15 出自 Intel 和 EPM9560GI280-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560GI280-15 EPM9560GI280-20
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $110.00 $162.50
Device Family MAX 9000 MAX 9000
Architecture CMOS EEPROM, third-generation Multiple Array MatriX (MAX) CMOS EEPROM-based Multiple Array MatriX (MAX)
Macrocells 560 560
Flip-Flops 772 772
User I/Os 216 —
Dedicated Inputs 12 —
Logic Elements / Gates 12,000 usable gates —
Internal Frequency (fMAX) 145 MHz —
Propagation Delay (tPD) 11.4 ns —
Clock-to-Output (tCO) 16.6 ns —
Supply Voltage (VCCINT/VCCIO) 4.5 V to 5.5 V (3.3 V or 5 V I/O) —
In-System Programmability 5.0-V ISP via JTAG Yes (IEEE Std. 1149.1 JTAG)
封装 280-pin PGA (ceramic, metal-sealed cofired) 280-pin PGA (PIN/PEG, square)
工作温度 -40 °C to 85 °C (industrial) —
Process Technology CMOS EEPROM —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status for GI PGA package]
湿敏等级(MSL) MSL-3 (168 hours) —
Technology Node — 5.0 V CMOS EEPROM
Logic Array Blocks (LABs) — 28 (16 macrocells each)
Usable Gates — 12,000
Maximum User I/O Pins — 216
Pin-to-Pin Delay (Speed Grade) — 20 ns
Supply Voltage (VCC) — 5.0 V
Programming Technology — EEPROM (non-volatile)
Terminal Form — PIN/PEG (through-hole PGA)
Package Code — PGA
Temperature Grade — Industrial
I/O Pin DC Input Range — -0.5 V to VCC + 0.5 V
Dedicated-Input Pin DC Input Range — -0.3 V to VCC + 0.3 V
I/O Transient Envelope (no-load, <20 ns) — -2.0 V undershoot to 7.0 V overshoot
VCC Ramp Requirement — Monotonic rise
Development Tool — Altera MAX+PLUS II
Supported HDLs — VHDL, Verilog HDL, AHDL

数据手册与资源

浏览全部产品 创建 BOM 获取报价